资源列表
rs232_interface
- 这是一个简单的UART 到 uPC 的接口. 可用于FPGA 和计算机的接口.-This is a small UART to uPC interface. Ideal to use with soft/hard processors in a FPGA project
CD-ROM-code-(vhdl)
- 数字信号处理的fpga实现 第2版-光盘代码(vhdl)-Fpga implementation of digital signal processing 2nd Edition- CD-ROM code (vhdl)
CD-ROM-code-(verilog-hdl)
- 数字信号处理的fpga实现 第2版-光盘源码（verilog HDL）-Fpga implementation of digital signal processing 2nd Edition- CD source (verilog HDL)
vhdl
- 开发板，初步功能，LED，串口等程序模块-develop board
vhdl-Classic-examples
- 提供了很多常用的硬件描述语言的算法，如移位器，计算器，与或非门的基本写法-Provides many commonly used algorithms hardware descr iption language, such as shifters, calculators, and basic wording of NOR gates, etc.
std_logic_1164
- VHDL的基本库，是学习VHDL的最原始也是最好的资料，代码很规范-VHDL basic library, learning VHDL most original and best information, the code is standardized
std_logic_unsigned
- VHDL的基本库，讲述基本类型的操作，重载等等，代码很规范-VHDL basic library, describes the basic types of operations, overloading, etc., the code is standardized
std_logic_arith
- 描述了VHDL加减乘除的最基本的操作，包括重载，最底层的实现，是理解一门语言的最好的途径-VHDL descr iption of the basic operations of addition, subtraction, including overloading, the underlying implementation is the best way to understand a language
txt_util
- VHDL库，仿真时使用的，包括打印，类型转换等实用的操作-Practical operation VHDL library, using simulation, including print, type conversion, etc.
Multi-function-digital-clock
- QuartusII开发的EDA 采用两个双十进制计数器74390 以及其他部件 组成了具有暂停 清零 调时针 调分针 12 24进制转换 整点报时等功能的多功能数字钟-QuartusII EDA developed using two pairs of decimal counter 74390 as well as other components of tune with the suspension cleared tone hour minute 1224 hex conversion
lab2_pci
- XILINX官方提供的PCI协议芯片设计的参考代码，具有相当高的参考价值。-PCI protocol chip design reference code XILINX official, with a very high reference value.
lab1_trx
- XILINX官方提供的高速串行收发器的设计源码具有很高的参考价值。-HIGH SPEED SERIAL TRANCIEVER