资源列表
hcsr04.tar
- Verilog program of the interface between a FPGA and the HCSR04 arduino sensor displaying the distance measured in the 7 segment display. Implemmented in FPGA Nexys3
LCD.tar
- C program of interface with a LCD display using an embedded processor (LatticeMico32) and a Nexys3 FPGA
UsbFPGAdemo
- FPGA底层的USB接口芯片的驱动，用于向上位机传送数据。-Driving USB interface chip FPGA bottom, used to transmit data to the host computer.
FPGA
- 常用的FPGA开发板的资料，方便大家查阅。-PGA development board used to facilitate access to information.
submit
- 用VHDL实现的双人飞机大战。支持PS/2和蜂鸣器。 需要两个CPLD核心协同完成。 含最终效果视频-Multiplayer air fight implemented in VHDL. PS/2 and beeper supported. Two CPLD cores are required to run this demo. Final video includes.
FIFO
- 利用verilog写的异步FIFO的一种写法-Using a written verilog write asynchronous FIFO
verilog
- 基于VHDL的编程注意事项以及平时经验积累-VHDL programming considerations and the accumulation of experience
verilogAlwaysblockexplanation
- verilog下always模块的介绍，以及怎么用always模块实现组合逻辑和时序逻辑，阻塞和非阻塞的深入介绍。-verilog：always block introduction
key_add
- FPGA实现移位加法器，验证可靠，用于实验课和平日科研，方便移植-FPGA Implementation shift adders, verification and reliable, and weekday classes for scientific experiments, to facilitate migration
dds
- 使用FPGA产生DDS信号发生器，方便移植，适合新手学习，开发环境Q2-Use FPGA generate DDS signal generator, easy migration, suitable for novices to learn, develop environment Q2
sram
- FPGA控制SRAM读写时序源码，代码桂发，新手一看就懂-FPGA control SRAM write timing source code Guifa novice understand at a glance
SegLed_DynamDisp
- 用FPGA是休闲其工作原理，结果为SEGLED动态显示-FPGA is casual with their works, the result is displayed as SEGLED dynamic