资源列表
jiafaqi
- 本实验中，我们将设计一个能进行加运算的8位（包括符号位）运算电路-In this experiment, we will design a can add operation 8 (including the sign bit) arithmetic circuit
manchesteruart_latest.tar
- Manchester编码转uart的vhdl 代码-Manchester to uart
HDLC-Controller---Documentation
- hdlc 编解码 vhdl fpga 说明文档-hdlc encoder decoder vhdl
Digital-Transmission
- 数字量通讯教学文档，图形化解释，说明，Digital Transmission-Digital Transmission
FPGASHIYAN
- 含有多个FPGA实验，包含代码，都是可用的，蛮适合初学者的。-Contains a number of FPGA experiments, including code, are available, very suitable for beginners.
ParallelScrablerDescrambler
- VHDL code for parallel 6-bit scrambler and descrambler
EP21_USB_FT245
- CycloneII I EP3C10E144 FPGA USB 驱动例程-CycloneII I EP3C10E144 FPGA USB driver routines
EP19_LCD_light_GAME
- CycloneII I EP3C10E144 FPGA 液晶屏 驱动例程-CycloneII I EP3C10E144 FPGA LCD driver routines
EP17_PS2_64X128LCD
- CycloneII I EP3C10E144 FPGA 320*64液晶 驱动例程-CycloneII I EP3C10E144 FPGA 64*128LCD driver routines
EP10_ADC0809_VHDL
- CycloneII I EP3C10E144 FPGA ADC0809 驱动例程-CycloneII I EP3C10E144 FPGA ADC0809 driver routines
EP8_PS2Mouse_VGA_GAME
- CycloneII I EP3C10E144 FPGA 鼠标VGA显示器的驱动例程-CycloneII I EP3C10E144 FPGA Mouse VGA display driver routines
dpllwc
- 基于VHDL语言编写的锁相环程序，能够实现比较精确的锁相功能。-PLL-based VHDL language program, to achieve more precise lock function.