资源列表
Digital-dynamic-display-FPGA
- 数码管动态显示 FPGA verilog 基本例程-Digital dynamic display FPGA
FPGA-PWM_LED
- FPGA 实现PWM控制LED的例程 具有参考意义-FPGA to achieve LED PWM control routine
des
- des algorithm Simple
image_ver_main
- The design of multi level sensor is mostly based on FSM controller-The design of multi level sensor is mostly based on FSM controller
parallel_prefix_flag
- design of parallel prefix adder in verilog
traffic_cntrl
- FSM based traffic light controller
DDSN
- quartus II 13.0 DDS工程文件，采用VHDL编写，可输出正交两路正弦信号。可以直接用modelsim-alter 仿真-quartus II 13.0 DDS project file, using VHDL written two orthogonal sinusoidal output signals. Can be simulated directly modelsim-alter
modelsim
- 一款用于扩频通信发射系统的CPLD程序，基本的QPSK调制-A used in spread spectrum communication system of CPLD program, basic QPSK modulation
sdram_demo
- 主要编写了sdram的驱动程序开发程序，在开发板上运行成功-this file is to drive sdr sdram , it runs on platform successfully
ex7_vga
- 此程序作为VGA液晶驱动程序，成功运行在自己开发的开发板上，屏幕分辨率1024x768-this code is designed to drive the VGA and the effiency is 1024x768
cache
- verilog 语言写的一个cache 平台是xillix ISE 实现了从cache中取指令命中和缺失情况的处理 -Verilog language to write a cache Platform is ISE xillix The processing of the instruction hit and the missing the cache is realized.
NIOSII_VGA_Controller
- Nios II VGA Controller with DMA The Nios II VGA Controller with DMA is an SOPC Builder component which can be added to any SOPC Builder system to provide VGA display capability. The controller is capable of displaying the following resolutions