资源列表
BCD_EXC3
- BCD-Exc3 code transcoder written in ABEL descr iption language
ChessClock
- Example of Chess Clock implementation in ABEL decription language.
PWMhuxideng
- VHDL语言编写的三总不同频率呼吸灯。使用PWM波控制呼吸频率。-VHDL language three total breathing light at different frequencies. Use PWM wave control breathing frequency.
smithwaterman
- 这个verilog代码实现的是DNA sequence alignment的功能-The verilog code is DNA sequence alignment function
8B-10B
- 8b10bencode bianmaqi -8b10bencode bianmaqi jiemaqi
quartus
- 流水灯状态机的一段式描述和二段式描述还有三段式描述的Verilog源码-Light water section of the state machine and the two-stage type descr iption descr iption descr iption of Verilog source code as well as three-
CPU
- 使用QuartusII软件，利用VHDL语言设计实现CPU,其中包含时序图仿真。-Using software QuartusII, using VHDL language to design the CPU, which contains sequence diagram simulation.
SERIAL-2-ETHERNET
- serial to ethernet converter
pwm_out
- FPGA产生PWM波控制led，修改管脚即可移植亲测有用。-pwm wave FPGA to control leds,including key controling
tlc549adc
- FPGA利用tlc549进行AD转换数码管显示，适用于有数码管的板子。-FPGA use tlc549 AD converted digital display, suitable for digital control board.
clock
- 原创数字钟verilog程序，能实现数字钟基本功能，如：计数，跑表，定时，闹钟。用于ISE软件。-Original digital clock verilog procedures, to achieve the basic functions of digital clock, such as: counting, stopwatch, timer, alarm clock.
clock-for-nios
- 基于niosⅡ的数字钟设计，适用于多种FPGA的开发板，修改管脚可移植。-NiosⅡ digital clock design is based on, for a variety of FPGA development board, modify pin portable.