资源列表
Oc_spi
- FPGA的SPI接口例子，功能成熟，可以参考-SPI Master Core Specification
I2c_v13
- FPGA的I2C模块实例代码，有说明文档，值得参考啦-FPGA I2C Model Sample Code Docs
controller
- Simple Microprocessor Design (ESD Book Chapter 3) Copyright 2001 Weijun Zhang Controller (control logic plus state register) VHDL FSM modeling- Simple Microprocessor Design (ESD Book Chapter 3) Copyright 2001 Weijun Zhang C
memory
- Simple Microprocessor Design memory 256*16 8 bit address 16 bit data memory.vhd- Simple Microprocessor Design memory 256*16 8 bit address 16 bit data memory.vhd
DSP
- FIR Digital Filter Design (DSP example) tested by Weijun Zhang, 04/2001 VHDL Data-Flow modeling KEYWORD: generate, array, range, constant and subtype- FIR Digital Filter Design (DSP example) tested by Weijun Zhang, 04/2001
Controller(FSM)
- Simple Bridge (ESD book figure 2.14) by Weijun Zhang, 04/2001 RT level design using Controller(FSM) + DataPath- Simple Bridge (ESD book figure 2.14) by Weijun Zhang, 04/2001 RT level design using Controller(FSM) + DataPath
GCD-CALCULATOR
- GCD CALCULATOR (ESD book figure 2.11) Weijun Zhang, 04/2001 we can put all the components in one document(gcd2.vhd) or put them in separate files this is the example of RT level modeling (FSM + DataPath) the code is synthesize
Verilog_HDL_FPGA_washing
- 基于Verilog_HDL的FPGA程序(智能洗衣机) 以DE0板为开发工具-The FPGA-based Verilog_HDL program (smart washing machines) for the development of tools to DE0 board
eep
- 实现了基于SPI接口的EEPROM控制器功能-SPI-based EEPROM controller
sha_core_latest.tar
- 完整的SHA 设计IP，可用于加密、IP SEC设计参考-FULL SHA IP DATABASE
S16C57
- 8位RISC CPU 设计IP，包含了文档、代码、仿真环境等-8BIT RISC MCU implemention reference ip,include rtl code,simulation and document
SRAM-IS61LV25616-taobao
- SRAM-IS61LV25616,进行SRAM读写操作，淘宝上买的-SRAM-IS61LV25616, SRAM read and write operations performed on Taobao bought