资源列表
dled.rar
- VHDL语言，动态数码管扫描显示。包含分频程序和扫描键盘程序。,VHDL language, dynamic digital tube display scan. Frequency Division contains the procedures and procedures for scanning the keyboard.
SOPC_pio_irq.rar
- 本源码为基于Alteral FPGA SOPC系统的PIO中断例程。,The source Alteral FPGA SOPC based system PIO interrupt routines.
Synplify.Premier.v9.6.2.with.I
- Synplify.Premier.v9.6.2.with.Identify.3.0.2 crack,Synplify.Premier.v9.6.2.with.Identify.3.0.2 crack
clock.rar
- 用vhdl实现的多功能时钟,有整点响铃,秒表等多种功能,Use VHDL to achieve multi-functional clock, there is the whole point of the bell to ring, a variety of functions such as stopwatch
EPM240Prj.rar
- 这是一个verilog HDL 语言的例子，在CPLD器件EPM240上实现了 RS232协议、按键处理、LED数码管显示和每秒加1数码显示。使用quartus ii 7.0 以上打开.,This is an example of verilog HDL language in the CPLD device EPM240 achieved RS232 agreement, deal button, LED digital tube display and digital display plu
vga_core(vhdl).rar
- vga视频输出（vhdl），主要是从sdram中产生图形，输出到vga中,vga video outputs [vhdl], mainly arising from the SDRAM graphics, output to vga Medium
clock_verilog.rar
- verilog语言实现的数字钟，各种定时闹钟功能类似真实的表~利用EDA实验平台实现~~,Verilog language implementation of the digital clock, alarm clock features a variety of regular table similar to the real experimental platform ~ using EDA implementation ~ ~
DA.rar
- 利用可编程逻辑器件进行D/A和A/D控制接口的设计 ,The use of programmable logic device to carry out D/A and A/D control interface design
EP2C5.rar
- Altera提供的CycloneII的orCAD封装库,Altera provided CycloneII the OrCAD library package
crackquartusii7.2sp3.rar
- 用于quartus7.2sp3的破解，里面有详细说明，操作方便,For the crack quartus7.2sp3, which has detailed instructions, easy to operate
HwLog10.rar
- 用verilog写的，基于查表法实现的LOG10运算器，在Altera FPGA中应用。,It is a verilog design of LOG10 calculation unit, which is based on LUT arithmatic. And it is applicated in Altera FPGA.
半整数分频器的实现（verilog）
- 半整数分频器的实现（verilog），本文以6.5分频为例！很实用的！,fen pin qi