资源列表
project_1
- 单车测速仪，利用霍尔效应原件测出一定时间内车轮转过的周数，从而计算得到速度。并在数码管上显示-Bicycle speedometer, the original use of the Hall effect to measure the number of weeks the wheels turn within a certain time, so that the calculated speed. And displayed on digital
Demultiplexing-200-MHz-Data-Streams
- Modern serial data protocols (e.g., FireWire, SONET, ATM, T4) sometimes require clocks that are faster than maximum FPGA global clock speeds. To solve this problem, the incoming clock (200 MHz in the example below) can be used to demultiple
Trouble-Free-Switching-Between-Clocks
- Asynchronously selecting between two clock sources can easily produce glitches that cause unreliable system behavior. The circuit diagrammed here avoids these problems.
CPU
- 不同方法实现的CPU系统。同样支持加减乘，逻辑/算术移位，与或非等建议指令。-Different methods to achieve CPU system. Also supports, subtraction, multiplication, logic/arithmetic shift, and the like or recommend instruction.
cpu2
- 实现简单的CPU系统，包括ALU,MAR,MBR,PC,IR,CU,BR等模块，可以实现简单的指令，如加减乘，逻辑/循环移位，与或非等-Achieve a simple CPU system, including the ALU, MAR, MBR, PC, IR, CU, BR and other modules, you can achieve a simple instruction, such as addition and subtraction multiplication, log
pwm-generators
- 此程序的功能是基于xilinx公司ISE平台实现pwm发生器。-Function of this program is to achieve pwm generator based company ISE xilinx platform.
drv_dm900
- 这是去年我编写的基于xilinx FPGA的MAC IP 核开发的驱动DM9000的源代码。基于Verilog 语言。-This is the last year I wrote based on xilinx FPGA the MAC IP core developed DM9000 driver source code. Based Verilog language.
RGMII
- 用xilinx芯片实现千兆网的实例代码，您可以通过修改此代码完成基于ETMAC IP核的MAC设计，驱动外部PHY芯片或进行MAC to MAC 的直连通信设计。-this is code of etmac IP inst.. it will help you developing for MAC and PHY
Maxplus2_74LS161
- 用Maxplus2制作的实现74LS161数字芯片功能，入门级工程。-Maxplus2 made with digital chips to achieve 74LS161 function, entry-level engineering.
8 bit, bit by bit procesing unit
- This module does an bit by bit sum, 2 complement,or,and,xor,and not operation of two 8 bit numbers (not and 2 compliment its just 1 number) It has two shift registers that feed your numbers to the procesing unit with an external load/shift signal and
31_Greedy_snake
- 贪吃蛇小游戏 verilogHDL语言描述 基于xilinxsparten6板子 -Snake game verilogHDL descr iption language based xilinxsparten6 board
eeprom_test
- eeprom的读写程序 veriloghdl实现 基于xilinxsparten6-eeprom literacy program veriloghdl Based xilinxsparten6