资源列表
cymometer
- 数字频率计的VHDL设计代码 数字频率计的VHDL设计代码-VHDL design of digital frequency meter digital frequency meter VHDL code design code
MYFX2
- 一个FPGA的仿真程序，用来测试FPGA的存储扩展-An FPGA simulation program, used to test the FPGA memory expansion
qd
- 数字抢答器的VHDL设计代码 数字抢答器的VHDL设计代码-The VHDL design of digital Responder Responder of the VHDL code for design of digital code
mms
- 四位密码锁的VHDL代码设计 四位密码锁的VHDL代码设计-Four of the VHDL code design locks four VHDL code design code lock
USBhpi
- USB FX2LP TO TI5402 HPI PORT MODE BOOT V1.0\FPGA代码(Quartus)-USB FX2LP TO TI5402 HPI PORT MODE BOOT V1.0 \ FPGA code (Quartus)
AT25256
- AT25256烧写方法的FPGA实例，大家请看啊-AT25256 FPGA programming method instance, we see ah
VerilogDesignExamples
- Based on a design spec, this pdf provided related examples on how HDL coding
FIFO82
- 一个测试FIFO16的VHDL程序，关于FPGA的，大家有用的分享啊-A test FIFO16 the VHDL program, on the FPGA, and it would be useful to share ah
HPI_GPIF
- USB FX2LP_TO TI5402 HPI_GPIF MODE BOOT V1.0FPGA代码-USB FX2LP_TO TI5402 HPI_GPIF MODE BOOT V1.0FPGA code
MUX
- VHDL Code for 4:1,2:1 MUX using when statment
crc
- 15位crc校验码的生成 通过除法运算生成15位校验码，以此判断传输的正确性。-fifteen bit crc
mux16_1
- VHDL code foe 16:1 MUX using structural modelling