资源列表
verilog-golden-reference-guide.cn
- verilog黄金参考指南中文版,verilog推荐参考书-verilog golden reference guide , verilog recommended reference books
can
- can module for vehicle automation
farrow
- 一份很好的数字时延程序（采用farrow算法），采用Verilog HDL，经过测试通过，是我一个雷达项目中的代替模拟时延的。精度很高，并有MATLAB程序验证-A good digital delay, Verilog HDL, procedures, is my test through a radar simulation project instead of the delay. Precision is high, and MATLAB validation
Wideband_DDC
- 宽带DDC的Verilog程序，及其MATLAB仿真程序看结果，最大可达100M带宽，程序中用的是50M-Wideband DDC' s Verilog program, and MATLAB simulation program to see the results, the maximum bandwidth of up to 100M, the program used is 50M
12.1inch
- Firmware for LCD AD Controller board with LP150x08 pannel B.rtmcib 1 This have reduced dimentions for 12.1 in 15" panel custumization
uart-txblock
- vhdl实现了UART的数据发送，将八位并行数据转成串行数据输出，并加上起始位和奇偶校验位，停止位。-vhdl UART data transmission realized, the eight parallel data into serial data output, plus the start bit and parity bits, stop bits.
TX-1C
- TX-1C型实验板,实现源码模板，不是PDF格式的文件，-TX-1C-based target board, to achieve source code template, not the PDF format,
ISE_lab1
- xilinx培训资料，配合相应的PDF文件使用-xilinx training materials, with the corresponding PDF file using the
Lab2
- xilinx培训资料，配合相应的PDF文件使用 共20个，先上传一部分，其他的有需要再上传-xilinx training materials, with the corresponding PDF file using a total of 20, first upload a part of, the other the need to re-upload
Lab4
- xilinx培训资料，配合相应的PDF文件使用 共20个，先上传一部分，其他的有需要再上传-xilinx training materials, with the corresponding PDF file using a total of 20, first upload a part of, the other the need to re-upload
alu4bitsynthesizable
- its a 4 bit arithmetic nd logical unit code in verilog. the software which is used for it is xilinx
mod10asynchro
- this is a verilog code for asynchronous mod-10 counter.its also called a decade counter.