资源列表
ISE_lab18
- 基于VHDL语言，通过调用Xlinx生产的FPGA开发板上的DDS核，产生正弦信号。并可进行仿真观察。-Based on VHDL language, by calling Xlinx FPGA development board produced by the nuclear DDS, sine signal. The simulation can be observed.
ISE_lab15
- 基于VHDL语言，介绍XLINX公司生产的FPGA系统中 PicoBlaze软核的基本应用。利于初学者使用-Based on VHDL language, introduced XLINX produced PicoBlaze soft-core FPGA system the basic application. Help beginners
mytime
- Verilog实现的实时时钟 功能，时分秒-Verilog timer
S5
- VERILOG SOURCE CODE FOR N MODULO COUNTER
ycrcb2rgb
- 用verilog实现ycrcb至rgb的色彩空间格式转换，可综合-ycrcb to rgb colour space convey
jiaotongdeng
- 下载到FPGA实验板得到验证！大家可以下载来参考及学习-ok!!!!
shuzizhongandvelirog
- 已下载到实验板验证，程序正确，大家可以下载下来参考学习-Experiments have been downloaded to the board certification, the program correctly, you can download information to learn ~~~~~~
lcd1602andveilog
- 非常好的程序，大家可以下载来学习-Very good program, you can download to learn ~~~~~~~~~~~~~
clock
- 用vhdl做的数字时钟，里面含有很详细的报告哦！-Vhdl do with digital clock, which contains a very detailed report on the Oh!
miaobaoandverilog
- 非常好的程序代码，大家可以下载下来学习及参考，已通过验证-Very good code, you can download and reference study has validated ~~~~~
dianzhen
- 256 级灰度LED 点阵屏显示原理及基于FPGA 的电路设计-256 grayscale screen display LED dot matrix theory and circuit design based on FPGA