资源列表
ctoverilog
- Verilog-to-C-Compiler: Simulator Generator
VGAfive
- 实现VGA显示，并在其中可进行5子棋游戏，基于NIOSII的-Achieve VGA display, and in which the child can be 5, chess games, based on the NIOSII
scrube
- 基于NIOSii的绘图板，在友晶提供的液晶屏上显示如同WINDOWS的界面，并同其绘图操作-Based NIOSii drawing board, the Friends of the crystal to provide the LCD screen on the display as the WINDOWS interface, with its drawing operations
ex9
- 一个I2C通信协议的verilog代码，开发环境是Quartus 2,产生结果在数码管上显示-I2C communication protocol of a verilog code, development environment is Quartus 2, produce the results shown in the digital control
secondclock
- 本设计是基于altera公司的ep2s750FPGA芯片的秒表计数器，其中包含六进制计数器和十进制计数器和万分频器等模块。-This design is based on the company s ep2s750FPGA altera stopwatch counter chip, which contains six binary counter and decimal counter and 10,000 divider modules.
danpianji.doc
- VHDL语言设计数字系统，VHDL是Very High Speed Integrated Circuit Hardware Descr iption Language 的缩写，意思是超高速集成电路硬件描述语言。本课程设计分析了现代城市交通控制与管理问题的现状，结合城市交通的实际情况阐述了交通灯控制系统的工作原理。编写了程序控制8255A可编程并行接口芯片，使红、绿、黄发光二极管按照十字路*通信号灯的规律交替发光，模拟了交通信号灯简单的工作。-VHDL language design digit
dlx2.tar
- vhdl program of dlx processor
ARM_Core
- ARM 7，有三级流水线，对于初学流水线芯片设计的学生来说，是个很好的教例！-ARM 7, there are three lines, chip design pipeline for beginner students, is a very good teaching cases!
ModelSim_Help
- 介绍Modelsim下对Xilinx公司FPGA进行后仿真的流程，推荐初学者下载学习-Introduced under Modelsim Xilinx FPGA for the company after the simulation process, recommended for beginners to learn to download
85
- 逐次逼近的VHDL开平方算法,作者：QQ 64134703 ，电子毕业设计，欢迎咨询 -VHDL open square successive approximation algorithm, the authors: QQ 64134703, e-graduate design, please consult
109
- VGA时序,作者：QQ 64134703 ，电子毕业设计，欢迎咨询 -VGA timing, of: QQ 64134703, e-graduate design, please consult
110
- VGA显示原理与VGA时序实现,作者：QQ 64134703 ，电子毕业设计，欢迎咨询 -VGA display with the VGA timing theory realization of: QQ 64134703, e-graduate design, please consult