资源列表
RS
- 基于FPGA的RS编码，包括RS码的编码原理，RS电路的设计与实现-FPGA-based RS code, including the RS, the coding principle, RS Circuit Design and Implementation
lift
- 简易电梯的设计与实现，包含用Verilog语言的编写，电梯的结构和工作原理-Simple elevator design and implementation, including the preparation with the Verilog language, structure and working principle of the lift
JiaoTongDeng
- 基于QuartusII 7.2软件的交通灯VHDL程序-Software based on the traffic lights QuartusII 7.2 VHDL program
Soft-core
- 介绍了基于ALTERA 公司FPGA 的双NIOSII 软核处理器在化工设备——脱丁烷塔控制系统中的应用。由于双CPU 处在同一块FPGA 芯片中，并且分担了不同的控制环节，使得整个控制系统与同功能类型产品相比，在成本显著降低的同时，安全性和抗扰动能力大幅提升-ALTERA FPGA-based company introduced a dual-core processor NIOSII soft Chemical Equipment- De-butane tower control syst
tlc7528
- VHDL语言编写的对TLC7528芯片ADC控制程序- VHDL program about ADC control of TLC7528 chip
epm570-2
- cpld使用手册，相信芯片资料介绍，一本不可多得的资料说明-cpld manual, I believe that chip materials, a rare information
O_DDS_PHASE
- 包括了DDS设计的全部源码，其中相位和频率均可调，可直接应用于sopc/fpga设计中-DDS design includes all the source code, which can be adjusted for phase and frequency can be directly applied to sopc/fpga design
V_ADC_SPCTR_ANALZ
- 包括了高速AD采样分析设计的全部源码，可直接应用于实际信号的AD采样分析。-Including the design of high-speed AD sampling and analysis of all source code, can be directly applied to samples of the actual signal AD.
V2_0809_SPCTR_ANALZ
- 包括了AD0809采样过程中RS232频谱分析的所有源码，可应用于实际信号的采样分析。-Sampling process, including the AD0809 RS232 spectrum analysis of all source code, can be applied to samples of the actual signal.
PS2
- 设计一个计数器，信号频率为10MHZ，没10M个信号记一次数。-counter
source
- verilog HDL程序设计教程，随书附赠的源码包，涵盖很多常用模块，内容很全。-verilog HDL programming tutorials, source code packages bundled with the book, covering many commonly used modules are very informative.
CPU
- 实现了简单的CPU功能 采用三级流水线和超标量-CPU functions to achieve a simple three-stage pipeline and superscalar