资源列表
electricwatch
- 用VHDL语言设计多功能的电子表。实现基本电子表的时间显示、闹钟、秒表等功能-VHDL language design with multi-functional electronic watch. The time table to achieve basic electronic display, alarm clock, stopwatch functions
FPGA1IIR4
- 关于iir介绍，希望与大家共同提高。对于了解此滤波器的学习以及研究很有帮助，资料的详细功能-About iir introduction, hope we can together. Filter learning for understanding and study of this useful, detailed information on features
cpu_lecture_latest.tar
- Simple AVR implementation in VHDL. Synthetyisable design.
FPGA_fenpin
- 利用FPGA构建一个1:1的分频器，稍加修改即可改成频率可控获占空比可控的时钟输出。-Using FPGA to build a 1:1 divider, you can change the frequency slightly modified controllable duty cycle controlled by the clock output.
DAC0832
- DAC0832 VHDL源程序 一个适合初学都的程序 -DAC0832 VHDL source code of a program suitable for both beginners
LCD12864
- LCD12864 VHDL源程序序 一个适合初学者的程序-LCD12864 VHDL source code sequence of a program for beginners
multiplicator
- multiplicator VHDL源程序 一个适合初学者的程序-multiplicator VHDL source code of a program for beginners
multiple_selector
- multiple selector VHDL源程序 一个适合初学者的程序-multiple selector VHDL source code of a program for beginners
quartus2
- 学习这个文档可以亲送的操作quartus，可以进行vhdl的开发-This document can be sent to learn the operation of the pro quartus, can the development vhdl
alu
- arithmetical-logic unit design in Verilog
KEISHI_CPU
- 计算机原理课程的课设，做了一个cpu，希望对学习计算机原理的同学的学习有帮助-Principle of the class set the computer to do a cpu, want to learn computer theory help students learn
keshe
- 计算机组成原理课设，做了一个cpu，希望对同学对计算机组成原理的学习有帮助-Computer organization course designed to do a cpu, the students hope to learn on the computer organization help