资源列表
bcd2bin_n
- This decoder binary to Binary Coded Decimal. Im tested on s3e-This is decoder binary to Binary Coded Decimal. Im tested on s3e
SerMod
- 串口控制器，带双FIFO非常好控制 verilog-Serial controller, with pairs of FIFO very good control of verilog
myinterpolation
- 复杂的插值函数，用于颜色空间转换 verilog-The complex interpolation function for color space conversion verilog
sopc_led
- 一个基本SOPC系统工程,用于学习SOPC系统的建立,应用程序的调试等-SOPC a basic systems engineering, the establishment of systems for learning SOPC, application debugging, etc.
counter
- Counter module that implements the counter module in VHDL.
IS64LV6416L
- Asynchronous SRAM IS64LV6416L modelsim仿真模型-Asynchronous SRAM IS64LV6416L Verilog model
IS61LV10248
- IS61LV10248器件的modelsim 仿真模型-IS61LV10248 Verilog model for modelsim
mt48lc4m32a2
- SDRAM mt48lc4m32 的modelsim门级仿真模型- modelsim gate-level simulation model for SDRAM mt48lc4m32
bubble_sort
- sort8k example using RECONOS
quadrature_phase_detect
- verilog程序，正交鉴相算法。可用记事本打开。然后复制到Quartusii里。-The programe written in hardware discr iption languange verilog.
aes_core_latest-1.tar
- Simple AES (Rijndael) balance implementation and trade off size and performance-Simple AES (Rijndael) balance implementation and trade off size and performance
afficheur
- Driver d afficheur de 4 chiffres de sept segments