资源列表
ALU_mo
- ALU architecture for a microcontroller by using VHDL synthesis
P_to_ser
- parallel to serial data converter using VHDL
debounce
- a key debounce logic using VHDL
7segment
- a seven segment display using VHDL
primeno
- how to detect a prime number using VHDL
8051IP
- 用硬件描述语言写的8051IP CORE-Using hardware descr iption languages written 8051IP CORE
MIPS_IP
- 用硬件描述语言写的MISP IP CORE-Using hardware descr iption languages written in MISP IP CORE
8086IP
- 用硬件描述语言编写的8086 IP CORE-Using hardware descr iption language of the 8086 IP CORE
FPGA24C02
- 用硬件描述语言编写的FPGA访问24O2的例子-With the FPGA hardware descr iption languages to access examples of 24O2
an485_design_example
- 用硬件描述语言编写的写的关于485 应用的例子-Using hardware descr iption languages to write about 485 such cases in the
fir
- 用状态机编写的FIR，verilog代码，已经经过仿真-With the state machine written in FIR, verilog code, and has passed through simulation
fir2
- 用memory编写的FIR，比较适合入门学习，已经过仿真，-Prepared with the memory of FIR, more suitable for entry-learning, has been simulation,