资源列表
vhdl
- FIR滤波器的性能参数 设计一个滤波器最基本的就是性能参数的,决定着滤波器的实际功能.比如阶数,截至频率。 本文滤波器设计参数 ①输入,输出数据宽度10位 ②阶数为4阶的线性相位FIR滤波器, ③类型:带通 -FIR filter performance parameters The design of a filter is the most basic performance parameters, determines the actual filter fu
LowPowerFPGADesignTechniquesforEmbeddedSystems
- 本文是国外一个研究低功耗FPGA设计的一位博士的论文,很有指导价值。-This article is a study abroad, the design of low-power FPGA, a doctoral thesis, is the guiding value.
seg7led
- 基于quartusII7.2的七段led试验程序,全面,丰富且完全通过功能验证-Led the team respectively quartusII7.2 based on testing procedures, comprehensive, rich and fully functional verification
cpld_zaixianxiazai_danpianji_cankao
- 单片机对CPLD在线编程参考——中文 .pdf-CPLD programming on-line single-chip reference- in Chinese. Pdf
wt
- 扩频发射机的设计实现与仿真 以QuartusII 7.2 为设计和仿真工具来实现直接序列扩频(DSSS)扩频发射机-Design and implementation of spread spectrum transmitter to QuartusII 7.2 and simulation for the design and simulation tools to achieve the direct sequence spread spectrum (DSSS) spread-spectr
VHDL
- 《VHDL硬件描述语言与数字逻辑电路设计》是很经典的vhdl语言入门书籍-" VHDL hardware descr iption language and digital logic circuit design" is a very classic book Introduction to vhdl language
VGAgen
- vga generation, genearting vga using fpga or any others resources
89S52heFPGA
- 关于verilog 和8052系列单片机的C语言程序 用于点阵型12864显示-fhds pd[dsfkjjklsdff
FPGA_Sistem_Embeded
- This is File from Lab ITS Surabaya
vhdl_mult
- hardware multiplier in VHDL
edge_detection
- edge detection algorithm in verilog HDL, along with test bench file. compiled in modelsim6.1
ram32b
- VHDL code for 32 byte RAM
