资源列表
Transmitter
- UART Transmitter Verilog Code
Receiver
- UART Receiver Verilog Code
AdderSubtractor
- 4-Bit Adder Subtractor Verilog Code. (Complete project)
UpDownCounter
- 8-Bit Up Down Counter Verilog Code
Serializer
- Serializer - UART Transmitter and Receiver Complete Project with waveform file-Serializer- UART Transmitter and Receiver Complete Project with waveform file
crack_dsp_builder_701
- dspbuilder7.0的破解文件，为开发人员必须安装MATLAB7.0以上的版本-the crack dspbuilder7.0 document MATLAB7.0 developers must install the version of the above
clock
- 用FPGA制作的电子时钟，程序简洁，时钟走时精准，带整点报时功能-FPGA with the production of electronic clock, the procedure is simple and accurate travel time clock, time zone function of the whole point
my_dot
- 基于FPGA的点阵显示程序，可移动显示多个汉字和字符，-Lattice FPGA-based display program can display a number of Chinese characters and moving characters,
i2c
- 基于FPGA的I2C内核的verilog程序-Verilog program of I2C core base on FPGA.
lcd
- fpga控制的lcd c语言程序，该lcd是12864型的，很有用-fpga control lcd c language program, the lcd is a 12864-type, very useful
dianti
- 在VHDL语言环境下实现6层楼的电梯控制系统-VHDL language environment in the realization of 6 floors of elevator control system
pwm_hw
- sopc nios ii学习资料介绍niosii 开发自定义外设pwm的verilog源代码-Learning sopc nios ii information on the development of custom peripherals niosii the verilog source code pwm