资源列表
Register8bits
- Register 8 bits VHDL code
DEMUX
- Demultiplexor vhdl code
ISPcode
- 基于xs300an开发板编写的一系列ISP程序，对与学习FPGA的编程控制有一点帮助-Xs300an development board based on a series of ISP preparation procedures, FPGA programming and learning to control a little help
seven
- 基于FPGA图形方法的七人抢答器-FPGA-based graphical methods of Seven Figure Answer
Count
- 基于FPGA图形方法的同步模231计数器（设秒脉冲已给） -Graphical method based on the synchronous FPGA module 231 counter (pulse has been set up to)
mydds_rom
- 自己在参加altera NIOSii 软核设计大赛时编写的一个ip核，用于产生频率可调的正弦波-Their participation in the design of soft-core altera NIOSii the preparation of a competition when nuclear ip, used to generate the sine wave frequency adjustable
Statemachinedesigntechniques
- 老外写的编写有限状态机的书，书中提供的各种技巧，方法对大家肯定很有帮助-The preparation of a foreigner to write finite state machine of the book, the book provides a variety of techniques, methods to be helpful, I am sure you
examples
- Verilong 经典例子 王金明：《Verilog HDL 程序设计教程》-Wang Jinming Verilong classic example: " Verilog HDL Design Tutorial"
servo_module_worked
- verilog pwm to control servo motor on quartus
cascaded_adder
- implementation of cascade adder with verilog plus testbench
PWM
- verilog pwm to control servo motor on quartus, with microprocessor generated from sopc and connected with sram-verilog pwm to control servo motor on quartus
i2c
- I2C协议verilog源码，包含完整的测试代码及设计文档。-Verilog source I2C protocol, including the complete test code and design documents.