资源列表
traffic2
- 数电课程设计，交通灯，基于Quartus II编写(Digital electric course design, traffic lights)
parallel_norflash_test
- ISE工程，并行nor flash的读、写、擦出，其中有个调用FIFO16-16的IP核，已经在工程中(ISE engineering, parallel nor FLASH read, write, erase, where there is a call FIFO16-16 IP core, has been in the project)
clock_shiyan
- 数电课程设计，数字时钟，基于Quartus II设计(Digital electric course design, digital clock)
para_norflash_altera_test
- 并行NORFLASH的verilog的quartusII工程，编译没问题，内含FIFO16*16(Parallel NORFLASH Verilog quartusII engineering, compile no problem, containing FIFO16*16)
FPGA_SPI_test_
- fpga和STM32通信，验证后好用！！！！(Communication between FPGA and STM32)
spi
- 用于SPI串口和并口以及并口和串口的转换(Serial and parallel conversion)
eetop.cn_GPIO
- 通用的GPIO coding，Verilog编码(GPIO coding wrote by Verilog)
eetop.cn_i2c_slave
- verilog 编写的i2c代码，很好，很清晰(i2c coding wrote by verilog)
eetop.cn_uart 源码 (Verilog)
- Verilog编写的UART通信模块，比较清晰(UART model wrote by Verilog)
eetop.cn_fifouart_latest.tar
- 用Verilog编写的带FOFI的UART model，比较好(FOFIUART model wrote by Verilog coding)
VGA_scan
- FPGA驱动VGA的扫描程序，输出五条方条，基于ED2.(FPGA drive VGA scanning program, output five square bar)
NoCRouter-master
- 基于2d mesh 拓扑结构的片上系统实现。有需要的可以看一下。(Implementation of on chip system based on 2D mesh topology. You can see it if you need it)