资源列表
FIR
- FIR结构数字滤波器，64阶。在Altera FPGA上验证通过-FIR digital filter structure, 64 bands. Verified by the Altera FPGA on the
chap5
- 一些简单模型的verilog代码，对学习很有帮助-Some simple model of verilog code, very helpful for learning
chap5
- Verilog135例，chap3-chap12,初学必备-Verilog135 cases, chap3-chap12, beginner necessary
eetop.cn_DDS_CORDIC_eetop
- 数字verilog设计数字算法CORDIC可以很好的为学生提供指导-Digital verilog design can be a good number of CORDIC algorithm to provide guidance for students
lcd_com1
- 青云开发的LCD模块LCM240128ZK3用于ALTERA的FPGA，自己写的AVALON总线IP核，供大家参考
pci32_top_pci32_v4_8.vhd
- XINLINX的PCI核源文件代码,这是我在网上找的，希望对大家有用！-THE SOURCE FILE OF PCI CORE，IT IS FOUND ON INTERNET. MAYBE IT IS USEFUL.
freq
- VHDL入门学习，基于FPGA的频率计设计-Getting started learning VHDL, FPGA-based frequency meter design
POC
- 基于VHDL开发POC接口代码，主要用于cpu和打印机之间的数据处理控制-VHDL code development based POC interfaces, cpu and the printer is mainly used for data processing control
LCDVHDL
- LCD控制VHDL程序与仿真程序代码很有价值
ADC0809
- 用状态机实现ADC0809的采样控制电路-Using state machine to achieve the sampling control circuit of the ADC0809
multifunction_clock
- 此为多功能数字电子钟的vhdl代码，有闹钟、时间可调、计时等功能
uart
- 本串口通信例程的功能主要演示AX516/AX545开发板的uart接收和发送的功能，在程序没有接收到PC机发来信息的时候,串口会不断的通过串口向PC机发送”Hello ALINX AX516”的信息。当用户从PC机发送数据给AX516/AX545开发板，程序接收到数据后会把数据从串口发回给PC,从而实现Loopback的功能。-The main function of this presentation uart serial communication routines AX516/AX545