资源列表
Frequency_counter
- VHDL语言写的频率计的程序，内带完整的技术报告-VHDL write the frequency of procedures, brought integrity of the technical report
fifo88
- 8*8位的先入先出（fifo）数据缓冲器的vhdl源程序-8 * 8 of the first-in-first out (FIFO) buffers the data source VHDL
cntm60v
- 基于VHDL的60进制计数器代码，可以实现六十进制计数-60 binary counter based on the VHDL code can be achieved sexagesimal counting
EDApingpongqiu
- 基于FPGA芯片，vhdl编写的乒乓球游戏，具有失球计数，指示乒乓球的方向，失球发声提示功能。-FPGA-based chip, vhdl writing table tennis game, with a clean sheet count, indicating the direction of table tennis, conceded voice prompts.
button33
- 基于FPGA的VERILOG语言的3*3按键程序-3* 3 keys based on FPGA VERILOG language program
FPGA-Median-Filter
- Digital filtering algorithms are most commonly implemented using general purpose digital signal processing chips for audio applications, or special purpose digital filtering chips and application- specific integrated circuits (ASICs) for higher
XC3S400TQ144
- Just little program for xilinx FPGA. It is can be used as a example for education.
vhdl-tutorial
- here is the vhdl tutorial by peter
FM-ok
- VHDL编写的驱动DDS，ad9850的程序，用于产生FM波
PS2_bodard
- VHDL实现PS2接口显示，实现平台XC3S500E-VHDL PS2 port platform XC3S500E
PS2
- 基于FPGA的ps/2接口的键盘解码实验代码-FPGA-based ps/2 keyboard interface experimental code decoding
digitalclock
- 数字钟 初学VHDL时可参考 模10状态机 83译码器-Refer to die 10 when the state machine 83 decoder VHDL digital clock beginner