资源列表
DF2C8_04_BEEP
- verilog实现蜂鸣器自动演奏一首乐曲，同时数码管显示当前演奏的简谱音符 符号。-verilog achieve buzzer automatically play a piece of music, and digital display notes the current performance of the musical notation symbols.
UART_TX
- 串口通行驱动，波特率自行更改，可以升级为自动使用于不同的接口-Serial port access driver, change the baud rate on their own, you can upgrade automatically use in different interfaces
FPGA-LCD(320-240)
- 程序主要为基于FPGA的320x240的LCD驱动-FPGA-based program primarily for 320x240 LCD driver
Target-tracking-algorithm
- 目 标 跟 踪 算 法的 一些 研 究 很 实 用-Very practical target tracking algorithm research
addDisplay
- 四人抢答器，用quartus编译过的，vhdl语言，说明详细，欢迎各位下载，-add display led
voter_VHDL
- 这是基于Quartus2开发环境和vhdl语音编译的表决器-voter basic on vhdl and Quartus2
国产高云FPGA-1AD8DA
- 国产高云小蜜蜂系列GW1N-LV4QN48 FPGA，JTAG配置，搭配8路DAC输出，1路AD输入。可进行信号处理应用。
DieuKhienLed
- dieu khien led DE2-70
ethernet__verilog
- fpga模拟以太网物理层的源代码，用verilog硬件描述语言开发。
verilog_basics
- Very nice introduction to Verilog by Teemu Pitkä nen
Synchronous_Design-of-huawei
- 华为公司在进行FPGA/CPLD设计时针对毛刺干扰及时序匹配所采取的同步化策略-Huawei making FPGA/CPLD design and timing match against glitch synchronization strategies adopted
traffic
- verilog信号交通灯源代码，不含测试文件-this is a traffic.writing by verilog,but it is not good.