资源列表
53011785-vlsi-Lab-manual
- This book is about VHDL programs
LED_Counter
- this code show how to use Altium to coding LED Counter on FPGA-CPLD
dds_synthesizer
- Verilog编写的基于DDS的信号发生器，频率可变。(Verilog prepared by the DDS-based signal generator, the frequency variable.)
myClock
- 四位数码管显示24小时时钟，附上了ucf 芯片是Kintex7(Four bit digital tubes display 24 hour clocks)
fpga_13
- fpage design 3 by zip file
vgajiekoudianyiheshiyong
- 对vga接口做了详细的介绍，并且有一些使用例子。-Vga interface to make a detailed introduction, and there is some use of examples.
Divider_Verilog_ISE
- 用Verilog语言编写的分频程序，包含奇数分频、偶数分频等许多例程。-Using Verilog language division procedures, including odd division, even dividing and many other routines.
VHDl100
- 100个学习ＶＨＤＬ的程序，适合初学者用，都比较简单-VHDL study of 100 procedures, suitable for beginners to use, are relatively simple
32X32LED
- 基于verilog语言编写的32X32LED点阵的字符显示程序-use the verilog to test the 32X32 led
binarycounter
- 看看咔咔咔咔咔咔咔咔咔咔咔咔咔咔咔咔的发送端放大所分散对方-see Kakaka Kakaka Kakaka Kakaka center of this center-Large scattered by the other side
vga2
- VHDL code for UP2 board of Altera, that generate a video signal to VGA port.
self_survey
- STEP7编程，可检测DP总线上模块的报错情况。-STEP7 program that can survey the models on DP bus and can indicate errors occured from models