资源列表
3344
- BulkIn是FPGA向CY7C68013发送数据 BulkOut是FPGA从CY7C68013接收数据-BulkIn is the FPGA to send data to the CY7C68013 CY7C68013 BulkOut is receiving data from the FPGA
5566
- Alter官方FFT程序(使用Verilog编写)-Alter official FFT program (written using Verilog)
xuanze4x1
- 基于VHDL语言 4选1 多路选择器 时钟48Mhz 功能4个输入只能有一个输出-Based on VHDL, 4 to 1 MUX clock 48Mhz features 4 inputs can be only one output
7788
- 用verilog编写的1024点的fft快速傅立叶变换-Written in 1024 by verilog point fast Fourier transform fft
99000
- VerilogHDL课件 学习的好资料 可以参考-VerilogHDL Courseware good information can refer to
read-RAM
- 读写RAM，很好用，我自己写的。 读写RAM，很好用，我自己写的。-Read and write RAM, is useful, I wrote it myself.
ajay-(1)
- fft fast fourier transform
Timer
- 嵌入式系统的单片集成定时器的Verilog实现。可实现多种配置模式，可作为通用的定时器设计模板-This is a standed timer for an SOC design.It can realize multible function need to design an micro process circut
lcd12864_test
- 用FPGA显示12864程序 12864 programs display with FPGA-12864 programs display with FPGA
jiaotongdeng
- 简单的交通的源代码，用vhdl程序编写。简单易懂。适合初学者参考。-Simple traffic source code, vhdl programming. Straightforward. Reference for beginners.
digital_clock
- 用VHDL语言实现常用的数字秒表，并在Sparten3E FPGA上运行通过。-VHDL language commonly used with a digital stopwatch, and Sparten3E FPGA run through.
pie
- 自己设计的RFID中的PIE编码，如果有错误欢迎改正。希望能给大家带来帮助。-RFID in their own design PIE encoding, if the error correction welcome. Hope that we can bring help.