资源列表
16_fenpinqi
- 这是一个用VHDL语言实现的16位分频器，能够实现分频作用，是一个完整的代码，大家可以参详参详。-This is a VHDL language with 16-bit divider, frequency effects can be achieved, is a complete code, we can participate in detailed reference.
adc-by-david
- adc for spartan3e fpga
40139249-Circuits-and-Systems-for-Wireless-Commun
- circuit and system ebook
rath_me
- rc5 implementation in verilog for different w/r/b compared with auther code
FPGA-Prototyping-by-VHDL-Examples
- FPGA Prototyping by VHDL Examples
Chapter-2
- FPGA Prototyping by VHDL Examples Chapter 2
Chapter-3
- FPGA Prototyping by VHDL Examples Chapter 3
Chapter-4
- FPGA Prototyping by VHDL Examples Chapter 4
Chapter-5
- FPGA Prototyping by VHDL Examples Chapter 5
pong
- Verilog code pong the game
Matriz-F
- Verilog VGA 640x480, Matriz VGA, decoRGB
Proyecto2(Gato)
- Verilog, Gato Game, CAT game!, VGA