资源列表
second
- 在QuarterII环境下开发 应用VHDL语言编写的秒表程序 能够用于计时-Development and application environment in QuarterII VHDL program can be written in stopwatch for timing
LCD12864
- 在Quartus II环境下开发 应用VHDL语言编写 用于LCD12864的测试程序-In the Quartus II environment, development and application of VHDL language test procedures for LCD12864
clock
- 在QUARtusII 环境下开发 应用VHDL语言编程 编写的时钟程序-QUARtusII environment in the development and application written in VHDL language programming clock program
fpga_-digital-oscilloscope
- 该程序是FPGA在数字示波器的数据采集，时基控制，平率测量，触发等数据采集系统的设计，是数字示波器核心部分-The program is FPGA data acquisition in the digital oscilloscope, the time base control, level measurement, trigger and other data acquisition system, the core of the digital oscilloscope
ASSIGNMENT6(B)_2010JTM2375
- How to connect a 9bit microprocessor to a 16bit memory device through a module.
additionneur4_bits.tar
- It s a VHDL code source to implement the 4 bits additionor in VHDL
ch2
- vhdl data type Signal Attributes • Specific values associated with signals. • Format: signal_name attribute_designator-vhdl data type Signal Attributes • Specific values associated with signals. • Format: signal_
065923198fire
- automatic fire sysytems
cordic_latest.tar
- core cording using VHDL
Projects-Suggested-for-FPGA-ASIC
- FPGA - ASIC file document
GL830
- USB2.0转sata-GL830 资料-USB2.0 to sata-GL830
auto
- verlog语言编写的自动售货机源代码，可供初学者参考 -verlog vending machine language source code reference for beginners