资源列表
Verilog--HDL-learing
- 这是夏宇闻老师的verilog经典教程，给需要的人看看，会有用的。-This is a classic Xia Yu Wen teacher verilog tutorials to those who need to see, that would help.
Animator
- it is a file written in VHDL to demonstrate a animation on a touch screen.
SATA-Connectivity-solutions-for-Xilinx-FPGAs.pdf.
- This gives an overview over the Serial ATA (SATA) protocol and the implications when integrating SATA into an FPGA-based programmable system. Besides details of the different protocol layers, we will discuss the hardware and software components for b
LCD
- tao library cho thu vienm pic 16f8-tao library cho thu vienm pic 16f877
filter
- 各种滤波器的源文件，供大家参考!已经测试了一下-Source files of various filters, for your reference! Have tested the look
ADC1
- 关于A/D的模拟到数字的转换，通过大家熟悉的Verilog语言实现。-On the A/D conversion of analog to digital by the familiar Verilog language.
taxi
- 关于计程车的计费系统，可以显示路程和所收费用-Billing system on a taxi, you can display distance and the fees
SOPC_IP
- 有关用verilog hdl语言编写sopc builder的介绍和应用 -For languages with the verilog hdl introduction and application of sopc builder
ping_pang
- 自己设计的一个乒乓球游戏，用LED显示乒乓球的运动状态，并且设计了击球和接球按键，还有计分系统。-Own design of a table tennis game, table tennis sport with LED status display and buttons designed batting and catching, and scoring system.
jiao_tong
- 自己设计的交通灯，分为主干道和次干道，各用三个LED代替红、黄、绿三色灯-Design their own traffic lights, divided into main roads and secondary roads, each with three LED instead of red, yellow, and green lights
SEG7
- 自己设计的数字钟，用6个数码管显示，并且可以调整时间-Digital clock of their own design, with six digital display, and can adjust the time
code
- it is the collection of the modules involved inthe design of digital fm.the code coves the key components like numerically controlled oscillator, loop filter, fir filter ,phase detector along with the complete cicuit implementation of the digital fm