资源列表
firewire.tar
- VHDL firewire code with tested files using modelsim
FIR_CODE
- 4-taps FIR VHDL code with testbench
ofdm-vhdl
- OFDM working code VHDL design
PLL
- Phase locked loop(PLL) Verilog HDL code
ASK_FSK_PSK_modulation
- VHDL code for communication modulation.v
video_capture_rev_1_1
- ADV7183 board controller i2c vhdl
ROM-FOFO
- ROM,FIFO，寄存器等各种存储器VHDL语言实现，已经用FPGA下载实现了-ROM, FIFO, registers and other memory VHDL language has been implemented with the FPGA Download
lcd-display
- 七位段码显示模块，采用自顶向下的编程模式，共三个开发程序-Seven segment display module, using top-down programming model, a total of three development programs
FPGA-pressure-altitude
- FPGA在无人机气压高度测量系统中的应用-FPGA pressure altitude measurement system in UAV Applications
Modular-Software-Defined-Radio
- 模块化软件无线电接收机 国外论文 讲得很详细-Modular software radio receiver made very detailed study abroad
chuzuchejijiaqi
- 基于FPGA的出租车计价器设计，有显示路程，费用，等待时间，语音提示等功能。-FPGA-based design of the taxi meter, showing the distance, cost, waiting time, voice prompts and other functions.
EDA
- 设计数字钟电路满足以下要求 ○1、具有时，分，秒，计数显示功能，以24小时循环计时。 ○2、具有清零，调节小时、分钟功能。 ○3、具有整点报时功能，整点报时的同时LED灯花样显示。 -Digital clock circuit designed to meet the following requirements ○ 1, with the hours, minutes, seconds, counting display, 24-hour cycle time. ○ 2, wi