资源列表
ExternSRAM
- actel fpga fusion kit操作外部sram程序-actel fpga fusion kit operating procedures for external sram
segscan数码管扫描
- 实现了fpga开发版对应按钮控制的数码管扫描(The realization of the FPGA development version of the corresponding button control digital tube scanning)
led
- 这是一个基于FPGA的数码管点亮程序，从0到F循环点亮。-This is a based on FPGA digital tube light program, from 0 to F light cycle.
verilog_rs232
- 用verilog实现串行口UART控制器，适用于XILINX器件-verilog UART controller
VHDL100li
- VHDL 100例,描述VHDL的重要应用,实用的例子.-VHDL 100 cases, important applications of VHDL descr iption, practical examples.
ex7_Cyclone_PLL_Test1
- FPGA简单应用，VHDL程序，PLL锁相环驱动程序，供学习参考。 -FPGA and simple application, VHDL program, PLL phase-locked loop driver, provide the reference for the study.
fpu_v2_10_example_designs
- fpu example designs with VHDL
verilog8B10B
- 8b10b编码方式，verilog语言实现，有测试程序。能成功编码。没有环回验证，读者可自行编写环回验证测试程序。-8b10b encoding, verilog language, test procedures. Successful encoding. No loopback verification, readers can write your own loopback verification test procedures.
KPCSMII
- Xillinx 的8位MCU软核的源代码，可在VertexII上运行，对CPU设计人员有很*意义-Xillinx the eight MCU soft-core source code can be run in VertexII. CPU designers to have great reference value
fpu_v19
- Floating Point Multiplier in VHDL
VHDL-fen-pin
- VHDL分频器，普通分频，偶数分频，奇数分频，小数分频等各种分频器的编写-The preparation of the VHDL divider, sub-frequency, even frequency, odd division, fractional-N divider
VHDLfenpin
- VHDL整数、小数、分数、偶数、奇数、非50 分频器设计-VHDL integer decimal points even odd number not 50 prescaler design