资源列表
qicheweideng
- 本课题设计一个汽车尾灯的控制电路。 汽车尾部左右两侧各有3个指示灯。当接通左转、右转或时，指示灯按照指定要求闪烁。
tut_timing_verilog
- Verilog source code is usually typed into one or more text files on a computer. Those text files are then submitted to a Verilog compiler or interpreter which builds the data files necessary for simulation or synthesis. Sometimes simulation imm
MODE
- 自己的找到的一些资料，感觉挺有用的，可以下来-Some find their own information, I feel quite useless, you can look
Hardware_Design_with_VHDL
- Hardware Design with VHDL
Ex_Somadores
- Somadores em vhdl (sum in vhdl)
VGA256
- 用verilog写的VGA256色显示设计，里面有详细的注释！-Using verilog write VGA256 color display design, which has detailed notes!
Alarm_Clock
- alarm clock vhdl implemention
万年历
- 基于FPGA的数码管显示，万年历，包括时分秒年月日的现实(Calendar FPGA digital tube display, based on reality, and the date of the time)
LS165
- LS165移位寄存器的verilog语言编写(The writing of the Verilog language of LS165 shift register)
九连环
- verilog语言解决九连环问题，显示在数码管上(The Verilog language solves the nine-link problem and displays it on the digital tube)
74ls109
- 74ls109电路的VERILOG源代码，已经验证-74ls109 circuit
test_spi
- fpga的小程序，大家有兴趣的看一眼，是一个测试spi的程序。，-fpga small program, we are interested to see one, is a test spi procedures. ,