资源列表
DIFF
- DIFF是比较两个数中相同的数字，然后输出一个相同的个数为5bit，输出vld标志。包含程序及说明-DIFF comparing two numbers is the same number, and an identical number of outputs 5bit, output vld flag. Contains the procedures and instructions
bouncing_ball
- 使用verilog硬件描述语言实现经典游戏反弹球（打砖块）。-Verilog hardware descr iption language using the classic bouncing ball game (Arkanoid).
taxi
- 出租车计价器，EDA课程相关实验，quartus ii -Taxi meter EDA course experiment, the Quartus II
veriloghdl快速入门
- verilog hdl 快速入门,里面包含很多有用的硬件描述语言的程序-Verilog HDL Quick Start, which contains many useful hardware descr iption language procedures
dds
- 用vhdk编写的dds信号发生器的代码，用fpga实现dds功能-Dds with vhdk signal generator written in code, using fpga implementation dds feature
fskpsk
- psk信号发生器在这个实验中，需要输入一个整周期内100个采样点的值，没有利用查找表的方法实现，而是直接在程序中输入100个采样点的值。2FSK/2PSK主要包括两部分2FSK信号发生器和2PSK信号发生器。2FSK信号发生器主要有分频器，m序列产生器，跳变检测，正弦信号发生器和DAC几个部分组成。2FSK的关键是通过判断信号跳变是来改变频率的变化，2PSK的关键是通过信号的跳变来改变相位的变化。-psk信号发生器
counterbasedDPWM
- 计数器方式的DPWM，有点简单，1本人是初学者，希望见谅，有更好的一定及时上传-DPWM Counter mode, a little simple, I am a beginner, I hope will forgive me, surely there is a better and timely uploads
fir_filter
- finite impulse response filter verilog
ISE_lab2(1)
- xilinx培训资料，配合相应的PDF文件使用-xilinx training materials, with the corresponding PDF file using the
TechXclusives-CreatingEmbeddedMicrocontrollers.zi
- Xilinx picoBlaze explained
miaobiao
- 用VHDL语言实现对FPGA的程序编写，实现秒表功能。-Using VHDL FPGA program written stopwatch function.
EDAkeshe--huanhuan
- 该文件里包含有EDA课程设计波形发生器的设计，可以实现波形发生，对信号的幅度和频率都可调-This file contains the EDA curriculum design waveform generator is designed to achieve waveform of the signal' s amplitude and frequency are adjustable