资源列表
CLOCK
- 基于FPGA的多功能电子时钟的设计很经典的哦
hdb3_codedecode
- 用VERILOG实现的，hdb3编码器和解码器，经过前仿真和后仿真成功-Achieved with the VERILOG, hdb3 encoder and decoder, after a successful pre-simulation and post simulation
FPGA
- fpga时延与定时控制,描述了设计时的注意事项-FPGA time delay and timer control
jtag
- verilog语言编写的jtag（边界扫描模块），初学的时候可以-verilog language jtag (boundary scan module), a novice when you can look
基于FPGA的彩色符号设计
- a、设计可显示横彩条和纵彩条的VGA彩条信号； b、设计可显示英语字母的VGA彩条信号； c、设计可显示移动彩色斑点的VGA彩条信号； d、设计可实现手动切换a、b、c三个功能.(The design can display VGA color color and color of the longitudinal cross signal. The design can display the VGA color signal of the English alphabet. The
xapp1247-multiboot-spi
- Xilinx 7系列 FPGA multiboot功能说明文档，增加FPGA加载可靠性(Xilinx 7 Series FPGA multiboot function descr iption document to increase FPGA loading reliability)
xianshi
- spartan-3e lcd 字符滚动显示-spartan-3e lcd display characters rolling
music
- FPGA 控制 弹奏音乐的小程序 还是蛮有意思的 新手可以学习-FPGA control applet playing music or the novice can learn very interesting
KX232_PIANO_C5H
- FPGA的例子程序，值得借鉴和实验使用。-Examples of programs the FPGA, it is worth learning and experimental use.
freq_counter(Verilog)
- 数字频率计FPGA代码，用verilog语言实现。-Digital frequency meter FPGA code with verilog language.
mux16
- 该程序中中就是要利用时序逻辑设计方法来设计一个 16 位乘法器-The program is to take advantage of the sequential logic design method to design a 16-bit multiplier
stop_watch
- This a running stop watch implemented on spartan 2-This is a running stop watch implemented on spartan 2