资源列表
Virtex-5-FPGA_DDR2_SDRAM_data
- Virtex-5 FPGA实现的高性能 DDR2 SDRAM数据采集，需要对V5有一定基础的人学习-Virtex-5 FPGA DDR2 SDRAM to achieve high-performance data acquisition, the need for V5 have to learn some basic
verilab_dvcon2012_uvm_cooper
- Getting Started with UVM by Verilab
FPGA_红外遥控系统设计
- 上电后我们的设计会发一次我们给定的数据码，然后在接受模块会接受到其发送的数据并在数码管上显示出来,之后我们可以用我们我的遥控键盘来发送数据,接收模块接收显示出来.(After power up, our design will send a given data code, then the receiving module will accept the data that it sends and display it on the digital tube. Then we can use
VHDlclock
- 数字秒表的VHDL课程设计 通过硬件测试 精确到ms 最大可计时为24小时 -Digital stopwatch curriculum design through the VHDL hardware testing is accurate to ms maximum time of 24 hours
fifo
- 在fpga中实现fifo，配合数码管显示，仅供学习参考-Realized in fpga fifo, with digital display, study and reference purposes only
S6_LCD_VHDL
- 采用vhdl语言编写的16x2液晶显示模块的驱动程序。在quartus中编译完成，可直接运行
jiaotongdeng
- 基于CPLD的交通灯控制，完成交通灯的功能，校错能力-CPLD-based control of traffic lights, traffic lights to complete the function, the school was wrong capacity
PWM
- 实现PWM波的产生,可用于电机控制.可以改变其占空比及频率来实现电机的调速.-Realization of PWM wave generation, can be used for motor control. Can change its duty cycle and frequency to achieve the speed control motor.
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- 八进制显示数码管用FPGA实现编程和必要的说明都有-Octal display effective FPGA implementation of digital programming and the necessary instructions have
FPGA_CMOS
- 基于FPGA的CMOS图像感器IA_G3驱动电路的研究-FPGA and CMOS image sensor IA_G3 drive circuit
cpu86
- CPU86 8086. IP core.
1024FFT
- 1024点FFT快速傅立叶变换 VHDL语言实现