资源列表
shuzi
- 一个用FPGA语言设计数字秒表的程序，有相关的源程序和说明-FPGA design using a digital stopwatch language of the procedures and instructions related to the source
xulijieceqi
- 1. 对串行输入数据din在时钟上升沿采样，当检测到din连续输入4个1时产生输出dout为1 2. 用拨码开关或按键输入输入串行数据,用一位发光二极管显示检测状态,并在数码管上显示连续输入1的个数.3. 序列检测器有同步复位功能。-xuliejieceqi
clock
- 在FPGA下用VHDL语言设计的数字钟程序-Under the FPGA design using VHDL, digital clock program
jtd
- 用VerilogHDL 实现交通灯的设计，分为主干道和乡村公路，当乡村公路无车时一直保持乡村公路红灯-VerilogHDL achieve with the design of traffic lights, is divided into main roads and rural roads, rural roads when the car has maintained a rural road without a red light
f_cout
- 基于Quartus II的8位十六进制频率计的项目设计，包含了项目文件和VHDL源代码-Quartus II-based 8-bit hexadecimal frequency of project design, including project documents and VHDL source code
music_player
- 用 alter FPGA 实现的music音频播放-Music with alter FPGA implementation of audio player
serial_number_check
- 序列检测，学习verilog三段式状态机的经典例程，modelsim仿真无误-Sequence Detection, three-state machine learning verilog classic routines, modelsim simulation is correct
bpsk
- 基于FPGA的BPSK数字调制器的实现，对于学习通信专业的人应该有些帮助-FPGA-Based Digital Modulator BPSK, for people to learn communication professional should be some help
face-detection
- 基于fpga的人脸识别，包括硬件平台的搭建的详细过程，人脸识别算法的详细程序代码。-Fpga-based face recognition, including the hardware platform to build a detailed process of face recognition algorithm detailed code.
xapp525
- xapp525 from xilinx website: SPI-4.2 to Quad SPI-3 Bridge
lab1
- VHDL USER GUIDE_ GOOD-GUIDE FOR NEW USER
InterefacingPS2Keyboard
- FPGA/keyboard interface is shown in figure 1. When the FPGA “reads” the Data or Clock inputs both PS2Data_out and PS2Clk_out are kept low which puts the tri-state buffers in high impedance mode. When the FPGA "writes" a logic 0 on an output, the