资源列表
LED
- 利用VHDL语言编写的实用的多模式显示的流水灯，它工作的频率手工可选，显示模式手工可选也可以自动切换。-Using VHDL language and practical multi-mode display of water lights, it works hand-selectable frequencies, selectable display mode can be automatically switched manually.
Example-8-1
- 我的观点是Verilog和VHDL对于高手而言各有利弊，Verilog感觉更适合于RTL（寄存器传输级）的描述，而VHDL更适于System级的建模。 但是初学者强烈建议学习Verilog，更容易入手些，但是学习过程中一定要注意下面一点，毕竟国内外大公司现在大都采用Verilog是有其原因的。 l FPGA/CPLD、ASIC的逻辑设计所采用的硬件描述（HDL）语言是同软件语言（如C，C++等）是有本质区别的！虽然Verilog很多语法规则和C语言相似，但是Verilog是硬件描述
debounce_2_Verilog
- 用VerilogHDL编写的按键消抖程序 分频产生100Hz的按键采样时钟,采样时钟周期为10ms, 按键按下后,产生时间为10ms的低电平信号,即LED亮10m-*Project Name :debounce *Module Name :debounce *Target Device :Any Altera FPGA/CPLD Device *Clkin : 50MHz *Desisgner : zhaibin *Date : 2011-11-
VHDLmath
- 这是一篇关于VHDL各种算术算法的文章，希望对各位有帮助 -This is a variety of mathematical algorithms on the VHDL articles, want to be helpful
MIDIsynthesisalgorithmanditsFPGAimplementation
- MIDI合成算法及其FPGA实现MIDI synthesis algorithm and its FPGA implementation-MIDI synthesis algorithm and its FPGA implementation
vga256
- 基于FPGA的VGA显示,256色显示,学会使用FPGA的ROM设计方法-FPGA-based VGA display, 256 color display, learn to use FPGA-ROM Design
FPGApingpang
- vhdl file welcome to download hehe please download it rihtnow and as soon as possible........~-vhdl file welcome to download hehe please download it rihtnow and as soon as possible........~!!!!!
stopwatch
- verilog 秒表程序 用quartus 编写-Verilog stopwatch ............................................................................................
cpu
- RIsc 处理区 内附仿真文件和相关报告-RIsc treatment area containing a simulation files and related reports
reinformationregardingapplicationfee
- paper format that includes Viterbi Decoder complete VHDL code for the document. Nh format paper format that include s Viterbi Decoder complete VHDL code for the document. Nh format paper format that includes Viterbi Decoder complete VHDL code for the
caideng
- 利用VHDL编写的实用的跑马，它工作模式可选，频率可选，也可以有电路自动选择。-Written and practical use of VHDL in Happy Valley, it is working modes, selectable frequencies, the circuit can also automatically select.
8个数码管显示数码管动态扫描显示
- 共阳极数码管显示1,2,3,4,5,6,7,8。FPGA可直接编译。