资源列表
XPS_Custom_IP_Tutorial_3
- Custom IP Core Development tutorial in Xilinx XPS Part 3
calc_16_01_14
- A VHDL code for a simple calculator.It reads the operator and operands form the memory and execute
FPGA-based-function-generator
- 本论文设计的任意波形发生器所要实现的基本功能： (1)输出波形的种类：正弦波、方波、三角波、锯齿波、脉冲波、手绘任意波形、任意公式波形。 (2)输出波形每一通道的频率、幅值、偏置都可以由用户调节，并且可以设置多个通道信号之间的相位差。 (3)编辑波形的方式有：设置参数、输入公式、手工绘制通信波特率的全部功能在PC机上实现。 -In this thesis, the arbitrary waveform generator to achieve the basic function
FIFO
- 同步和异步FIFO，VHDL实现。希望对大家有所帮助。-Synchronous and asynchronous FIFO, VHDL implementation. We want to help.
Datapaths
- vhdl source code for 8 bit datapath logic
22SystemVerilog
- SystemVerilog 介绍 对初学者很有好处
ADCtest
- 利用Verilog HDL对AD7705进行控制ADC采样，实验室师兄的
Example-1-1
- XILINX ISE 9.X FPGA/CPLD设计指南第一章代码-XILINX ISE 9.X FPGA/CPLD Design Guide Chapter code
FPGA_PWM
- 基于FPGA的温度检测和PWM风冷系统的设计与实现，很要用的一片论文。-FPGA-based temperature measurement and PWM cooling system design and implementation, is to use a piece of paper.
altera_de2_vhdl
- Tutorial of VHDL with Altera DE2 board: quartus II and DE2 board The target do the BCD sum of input data coded with the switches and display the result on 7 segment display
Serial
- 基于epm1270的串行通信vhdl代码-serial vhdl code for epm1270
secretlock
- 密 码 锁- s e cret lock