资源列表
cavlc_latest[1].tar
- it is cavlc verilog code
123456
- 光电倍增管的资料对没使用过光电倍增管的人有一定的学习参考价值-this is the document of amper of photolight,which can help you studing cuicut designing
FT232H EEPROM Modify
- FT232H编程代码，可用于制作JTAG调试器(FT232H EEPROM Modify)
syn_fifo_use
- fpga 同步fifo调用 vhdl语言编写syn fifo use -synchronous fifo call fpga vhdl language syn fifo use
5.1-1602
- 1602字符液晶显示程序，用来完成液晶的显示，基础的那种-1602 character LCD program, to complete the liquid crystal display based on the kind of
pwm
- pulse width modulation (pwm) made with vhdl
fsmc_ad9215
- 主要是基于FPGA(EP2C8Q208I8)下的高速AD9215驱动，程序语言为Verilog,开发环境为quartusII 7.0,为一工程，可直接下载到FPGA中，含电路图-Mainly based on the high-speed AD9215 FPGA (EP2C8Q208I8) under the driver, the programming language for Verilog, a development environment for quartusII 7.0, for
AND-Gate-Using-Behavioral-Modeling---iblocks_file
- and gate design in verilog
123123
- VHDL课程设计，交通灯的项目文件，已仿真通过。-VHDL course design, the traffic lights project file, already simulation through the.
jtag
- verilog 实现的 jtag TAP ， 转自 opencore.com， 已通过验证
QuartusII_IP_Core
- 以设计双端口RAM为例说明QuartusII中利用免费IP核的设计的详细教程-To design dual-port RAM as an example of the use of a detailed tutorial QuartusII free IP core design
117143157digitalclock
- eda 工具的强大应用 希望大家可以喜欢他-eda tools, powerful applications like him hope that we can