资源列表
computer10
- 基于VHDL语言的设计8位CISC微处理器实例-VHDL design language based on 8-bit CISC microprocessor examples
serial
- 基于FPGA的串口通讯,能够实现串口助手给fgpa发送16进制的数字，FPGA也能够向串口调试助手发送数据-Based on FPGA, serial port communication can realize serial assistant send fgpa hexadecimal Numbers, the FPGA can also send data to serial debugging assistant
DiSyLab1
- A vhdl design of a simple arithmetic and logic unit (alu)
pinlvji
- 基于FPGA的数字频率计，内含ise工程文件，各模块代码。-VHDL FPGA ISE
moto2
- 使用CPLD进行驱动电机演示，使用硬件编程语言，适合初学者-use of motor-driven CPLD for a demonstration of the use of hardware programming language, suitable for beginners
plljishi
- 利用脉冲计数产生一个脉宽可调的脉冲，然后作为使能信号送给计数器。测试在具有不同相位时钟下的计数效果，太过设置计数频率，可发现不同相位的时钟计数差别，经验证-Pulse counting to generate a pulse width adjustable pulse, and then as an enabling signal is sent to the counter. Test in a different phase clock count, too set the count f
Signal-Generator-VHDL-design
- 信号发生器VHDL设计 波形可选：正弦(sine)，方波(sqr)，锯齿波(jc_de和jc_in两种)，三角波(sanj)和阶梯波(stair)信号模块-Optional waveform signal generator VHDL design: sinusoidal (sine), square wave (sqr), sawtooth (jc_de and jc_in two kinds), triangle wave (sanj) and staircase (stair) sig
FPGA_overview
- An overview of FPGAs and FPGA programming Initial experiences at Daresbury
cpld
- 利用quartus软件对CPLD进行文档建立、软件编程、时序仿真-CPLD using the quartus software for document creation, software programming, timing simulation
sun1602
- 能驱动LCD1602的VHDL程序，芯片是ACTEL的Fusion系列-Vhdl LCD1602 for ACTEL
VGA_PONG
- pong game using vhdl code.a simple one.
Practica-1
- Counter with preload VHDL