资源列表
ml402_emb_ref_81
- xilinx ML402 开发板的 edk 例程-the EDK demo of xilinx ML402
CPLD
- verilog编写的加减6路可逆计数器，用于FPGA对6路脉冲信号的计数-verilog written addition and subtraction 6 way reversible counter for FPGA on the 6-channel pulse count
aes
- contains AES doc with code in Verilog
CY7C68013FPGA
- USB控制芯片cy7c68013与FPGA通过slave fifo方式通信，块传输数据-USB controller chip and FPGA cy7c68013 way communication through the slave fifo, block data transfer
OV5640_datasheet.pdf
- OV5640摄像头CMOS摄像头用户手册(OV5640 camera CMOS camera datasheet)
uart_serial_vhdl
- fpga例程：用实fpga现uart串口通讯的vhdl详细代码，附一个串口通讯助手小插件-fpga routines: solid fpga vhdl now uart serial communication code in detail, with a small plug-in serial communications assistant
limited_des
- this DES encryption and decryption code in verilog-this is DES encryption and decryption code in verilog
FPGA
- 文件中是清华远见培训姚老师所讲的FPGA在数字视频图像处理系统的设计方法-FPGA image processing
IIS_VHDL
- VHDL实现了IIS接口程序，在Quartus II 6.0上编译通过，在板子上可以读取IIS数据-IIS VHDL interface procedures, the Quartus II 6.0 compiled by the board can read data IIS
8255
- 可编程并行接口芯片8255A VeriLog实现-8255A programmable parallel interface chip
AMBA
- AHB SPECIFICATION SPECIFICATION SPECIFICATION SPECIFICATION-AHB SPEC YOU KNOW IT THAT IS RIGHT, SPECIFICATION SPECIFICATION SPECIFICATION SPECIFICATION SPECIFICATION
Test
- This an implementation on basic logic gates in Verilog HDL-This is an implementation on basic logic gates in Verilog HDL