资源列表
chuankou
- 接口连接程序实现的知道材料，帮助了解和实现串行接口的接入程序的完成。-Interfacing program to know the material, to help understand and achieve the completion of the serial interface of the access program
canbus
- 用verilog编写实现的CAN总线控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the verilog source code to achieve the CAN bus controller, bring their own testbench, after decompression project file can be opened with the ISE.
Project
- 这是一个关于cache的verilog代码，有icache和dcache的实现-a verilog code about the cache including i cache and dcache
CPLD_DEMO_OK
- 可以给VHDL初学者看的实例，全部经过验证-VHDL beginners can see examples of all the proven
CPSK
- CPSK的源程序基于FPAG的数字调制器，毕设做的，不知道对你们有用没-CPSK source FPAG based digital modulator, complete set do not know is not useful to you
AAT1100-T1
- 三通道可编程PWM控制器芯片，用于计算机主板散热风扇驱动-Three Channels PWM Controller
IIR_filter
- 本实例利用硬件乘法器实现一个IIR滤波器。文件包含实现的verilog代码。-The example used to implement a hardware multiplier IIR filter. File contains the implementation of the verilog code.
modelsim_manual
- modelsim的使用教程 对于初次使用这块软件的人来说 这个教程非常有用-modelsim tutorial for first-time use piece of software, this tutorial is very useful for people
vhdl
- VHDL课件，详细介绍了怎么编写程序，是入门者的好资料。-Good Courseware of VHDL for the beginners
divide_10
- 十分频 quartus实现 有RTL图-RTL is a graph realization of the frequency quartus
OFDM-16QAM
- 基于OFDM中的基带处理的16QAM调制，基于ISE编程软件,有完整的仿真程序-16QAM constellation mapping of the OFDM communication system
miaobiaosheji
- 用FPGA设计一个秒表。用于体育比赛中。精确度为百分之一、里面有设计流程和程序-use fpga sheji yige miaobiao yongyu tiyu bisai zhong .jingquedu wei baifenzhiyi