资源列表
linearconvltn
- linear circular convltn fir filter
syncram
- verilog rtl and testbench code for single port sync ram
rs_232
- Comunication rs232 in vhdl
Verilog_Music_liangzhu
- Verilog实现的一首好听的音乐 梁祝，希望对大家有帮助-Verilog realization of a good music Butterfly, I hope all of you help
imem
- VHDL单周期处理器指令解码器，可完成单周期指令解码-VHDL single-cycle processor instruction decoder, to be completed by single-cycle instruction decode
Pwm_out
- 基于SOPC技术的pwm的VHDL语言设计-SOPC technology based on the VHDL language design pwm
DA
- verilog 串行AD转换 TLC549AD采样程序-verilog serial AD converter TLC549AD sampling procedures
ALU
- 此代码能高速实算术逻辑单元的功能，适合risc_CPU的设计。若有不足，请多多包含。-This code can be really high-speed arithmetic logic unit function, suitable for risc_CPU design. If insufficient, please contain.
char_fifo
- character FIFO in VHDL very speed
pwm
- 利用verilog来实现PWM信号的产生-PWM verilog
clockreverse
- 数字钟 能实现倒计时 小时和分钟的调整 复位和暂停倒计时-clock
sum99
- 基于maxplus2的八位加法器，已经通过仿真-maxplus2 based on the eight Adder, through simulation