资源列表
地铁站售货机源代码
- 基本售货机源代码，实现了选择货物，投币检测，找零等基础的功能，里面有详细的注释说明。
XAPP1026 on the Zedboard
- documentation for LwIP implementation in Zedboard
IPcore
- 基于EP3C25的Altera SDI IP核的使用-EP3C25 Altera SDI IP
half_adder_VHDLproject
- 常用的VHDL模块，适合VHDL入门者，本系列一共包含六个VHDL模块，本文件是半加器模块 1.算术逻辑单元（alu_1706）,实现算术逻辑运算 2.CPU寄存器组（cpu_register），实现四个通用寄存器（具有读写功能），一个PC寄存器（清零，置数，加一计数，减一计数，工作使能）。 3.全加器（full_adder） 4.半加器（half_adder） 5.3-8译码器（mutex_3to8） 6.计算机运算器（S6）实现运算器相关功能-VHDL modules
clock
- 实现数字电子时钟功能，包括时，分，秒，可显示-Implemented digital electronic clock function, including, points, seconds, can show
eda
- eda语言学习代码，基础内容辅导与设计，学习eda必备，有效缩短学习时间-eda language learning code, basic content and design counseling, learning eda necessary, shorten the learning time
fpga.rar
- fpga 基于FPGA的mif文件创建与使用,fpga FPGA-based mif file creation and use of
spi
- SPI IP CORE Verilog quartus-SPI IP CORE Verilog quartusii
vga_modelsim
- 这是一个通过modelsim仿真通过的例子，学会如何仿真代码，程序思路清晰明了，易学习。-This is a adopted by the modelsim simulation examples, learn how simulation code, program ideas clarity, easy to learn.
chuzuche
- 本程序使用verilog语言编写的出租车计价系统，实现时距并计！主要用状态机来实现！-This program uses the taxi meter verilog language system, and taking into account the time-distance! State machine is mainly used to achieve!
ddr2sdram_spartan3s700an.tar
- It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit - Diligent fully working.-It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Sparta
spi
- 利用verilog语言 实现spi协议功能-verilog achieve spi protocol functions.