资源列表
electronic-organ
- 基于FPGA的电子琴，分为手动和自动模式，即按键发音，或通过蜂鸣器唱某一首歌（需自行设定音符），-Divided into manual and automatic mode, the pronunciation key FPGA-based keyboard, or sing a song (your own set of notes) buzzer
state_machine
- 适合初学者。简单的状态机，有8个状态,数码管输出当前状态的编号.基于Mars-XC3S400-F实验板-Suitable for beginners.A simple state machine, there are eight state, digital tube output the serial number of the current state. Based on Mars- XC3S400-f experiment board
CPU
- 简单的16位CPU的VHDL设计 vhdl代码和cpu设计过程
CPU
- 用VHDL编的简易16位和8位CPU，可完成加减乘法移位等功能，拥有源码和设计文档，资料齐全-Compiled with VHDL simple 16-bit and 8-bit CPU, to be completed by addition and subtraction multiplication shift functions, with source code and design documents, data and complete
NotasCompletas
- notes for VHDL projects to design and architecture comprehention
DC-Motor-Speed
- 1、 掌握直流电机的工作原理。 2、 了解开关型霍尔传感器的工作原理和使用方法。 3、 掌握电机测速的原理。 -A master DC motor works. 2, Hall Switch Sensor understand the working principle and use. 3, grasp the principles of the motor speed.
chuzuche
- Verilog编写的出租车计价程序，Altera公司的DE2开发板环境中。-Taximeter program written by Verilog, Altera' s DE2 development board environment.
DDR2-verilog
- ddr2的Verilog代码，包括时序控制，数据读取，利用verilog编写的ddr2控制器，在spartan6板子上得以验证，成功实现了FPGA与DDR2的通信。-ddr2 of Verilog code, including timing control, data is read using verilog prepared ddr2 controller board on spartan6 be verified, the successful implementation of the
seg70
- 适合fpga，verilog初学者。按一定的频率轮流向各个数码管的COM端送出低电平，同时送出对应的数据给各段。以动态扫描方式在8位数码管“同时”显示0 7-According to certain frequency in turn to various digital tube COM client sends out the low level, at the same time to send out the corresponding data to the paragraphs.In
key
- 是一个嵌入式开发的FPGA板子连接键盘进行测试的小实验说明-Is an embedded FPGA development board connected small experiment to test the keyboard descr iption
taxi_cnt
- 出租车计费器 根据出租车计费器原理本逻辑模块需包括以下内容：复位模块，开始计费模块，里程计数模块，里程判断模块，停车判断模块，停车计时模块，停车时间计费模块，里程计费模块，总计费模块，LED计时里程计费显示模块，高额费用报警；-taxi count