资源列表
dj052
- VerilogHDL设计的具有传感器探测主、支路车流量以控制灯延时的交通灯
MT9D112
- VGA cmos芯片 480*640 30万像素 MT9D122手册-480* 640 VGA cmos chip, 30 million pixels MT9D122 Manual
VIS-Instruction-Set
- 开源可扩充处理器架构.源代码.VIS.Instruction.Set-VIS Instruction Set
Altera-Lab-3
- Altera Lab 3 for DE1 - Manual and Solution
orcad_tutor
- A CODE FOR EDGE DETECTION IN FPGA
1
- Quartus_II使用教程,Quartus_II使用详细步骤-Quartus_II use the tutorial, Quartus_II detailed steps
led_shift
- 在xilinx的ISE上写的LED灯移动的verilog程序-a verilog code for led-shifting which writed with ise 14.2
CIII_EP3C40F780C8_37_Calculator
- SOPC,CycloneIII系列芯片EP3C40F780C8，NIOS II IDE,简易计算器实验代码-SOPC,CycloneIII，EP3C40F780C8，NIOS II IDE, CALCULATOR code
VGA
- 用VHDL语言描述的VGA显示程序，可用赛灵思公司的软件打开-Described using VHDL, VGA display program, available Xilinx' s software to open
Synthesis-and-Simulation
- Synthesis and Simulation Design Guide，Xilinx公司的FPGA逻辑综合与仿真，英文版的。-Synthesis and Simulation Design Guide
frame_cap
- GPON中下行帧捕捉模块的verilog程序，在quartuaII上已经验证过，需要的可以拿去参考下-GPON downstream frame capture verilog program has already been verified in quartua can take to refer to the following
BTL_VHDL_Nhom_4_
- VHDL starter document