资源列表
ARM32Barrelshifter
- VHDL ARM 32位桶形移位器的设计-VHDL ARM 32-bit barrel shifter design
DE2_SD_Card_Audio
- 基于altera的DE2开发板的SD卡中读取音频信号成功范例-Successful example of the audio signal based on the altera DE2 board SD card
pingpong
- 使用Verilog HDL 实现了一个桌球游戏，并在DE2开发板上验证通过。-Use Verilog HDL to achieve a table tennis game, and through the verification on the DE2 development board.
FPGAwave
- 这是一个函数发生器的程序，能够实现100k-10M的三角波，方波，正弦波。-This is a function generator program, to achieve 100k-10M triangle wave, square wave, sine wave.
CNN
- THU微纳电子系ic设计课程大作业，使用verilog实现CNN加速器，含一层卷积和池化，仿真通过。(a CNN accelerator written in VerilogHDL, including one conv layer and one pooling layer, simulation passed)
FIR_filters_Xilinx
- FIR filter design method using Xilinx FPGA platform.
ethmac
- 以太网的verilog代码，来自opencores网站。-Ethernet verilog code from opencores site.
ss868_FallingSandGame_restored
- 硬件代码,用于FPGA开发平台上视频处理，产生优美的视频图像-EDA ,verilog HDL
fpga_diy
- 本文总结了，利用FPGA开发的比赛作品，供初学者学习使用。-This paper summarizes the, the use of the game development FPGA works, for beginners learn to use.
ram_latest
- VHDL实现CISC模型微处理器设计（含有rom和ram）本程序实现的是输入10个数，输出最小负数-VHDL model to achieve CISC microprocessor design (with rom and ram) to achieve this procedure is the number of input 10 and output the smallest negative
8psk
- 利用DDS原理设计8psk的原代码，已通过调试-8psk principle design using DDS source code, which has passed the commissioning
VHDLprogram
- 含有各类寄存器，AD和DA转换器，各种算法，有限状态机，还些许组合逻辑电路设计代码-Containing various types of registers, AD and DA converters, a variety of algorithms, finite state machine, but also some combinational logic circuit design code