资源列表
multi_cpu
- 用xilinx ISE 14.3开发的多周期CPU系统，开发语言为verilog HDL.仿真调试与实际测试均已通过-Using xilinx ISE 14.3 development of multi-cycle CPU system, development language for verilog HDL. Simulation debugging and practical tests have passed
8-CPU
- 简单的8位CPU，内含PDF文件.可自己查看详细说明-simple eight CPU, containing PDF files. They can check details
cordic
- 基于CORDIC算法的指数函数生成器的各种理论基础，通俗易懂-CORDIC algorithm based on exponential function generator for a variety of theoretical basis, user-friendly
FPGA
- 其中包含一些以前学习时写过的各种加法器和HDB3编码，以及状态机的一些题目-Which contains a number of previously written a variety of learning adder and HDB3 encoding, and the state machine of some of the topics
CPU_16
- vhdl实现cpu,在实验台上模拟访存，实现简单的四则运算以及跳转-a cpu by vhdl and used on table
RTC
- actel fpga开发板fusion startkit实验例程，包含完整工程文件几verilog HDL 源码-actel fpga development board fusion startkit test routines, including the complete works of several verilog HDL source file
MSP430F2013-Microcontrollers
- How to program MSP430F2013. A detailed descr iption of the peripherals and their use.
a_digital_time_keeper1
- 数字时钟 已经在quartus2仿真验证过 VHDL代码-Digital clocks already in quartus2 simulation validated VHDL code
VGA1
- 基于ALTERA DE2 开发板开发的VGA外接屏Verilog显示程序。-ALTERA DE2 development board based on the development of Verilog VGA external screen display program.
Desktop
- un crack pra quartus II 11.0 sp1
DDS_all
- 这个是相当不错的EDA编程，是电子设计大赛准备期间我引以为自豪的一个，能产生正弦，余弦，方波（可调占空比），三角波，锯齿波以及各种叠加波形，可以自行设置。
PCI8360
- PCI8360整合版驱动(2008年11月12日)PCI8360 integrated version of the driver (November 12, 2008)-PCI8360 integrated version of the driver (November 12, 2008)