资源列表
UARTIntr
- 基于avr单片机的串口中断收发代码，并设立缓冲区-Avr microcontroller-based serial port interrupt to send and receive code
EliminateGlitch
- 通用消除窄脉冲和最大脉冲宽度判断,用于防止外部干扰导致通讯异常,硬件EMC等-GM to eliminate narrow pulses and maximum pulse width to determine, for the prevention of external interference caused abnormal communications, hardware, EMC, etc.
spartan3e_adc
- example of spartan3E stater kit ADC
IR
- 此程序接收红外发射过来的数据，接收解码后由CPU读取,程序运行前将S2都拨到ON.J17短接第一和第二脚。-This program receives the data of the infrared emission over receiving decoded by the CPU to read, before the program runs S2 the appropriated ON.J17 short then the first and second foot.
SUB_UNIT
- floating point subtract unit
encode
- sourcecode for 8b10b encoder
dianyuan
- saber的仿真模型，是一个电源的，经过调试已经成功-The simulation model of the saber, is a power, after commissioning has been successfully
lab6
- ISE 13.4中SDK开发时的时钟中断程序，实现每秒产生中断，并由led灯显示-The ISE 13.4 SDK development clock interrupt program, the interrupts generated per second, by led lights display
tanchishe
- 用硬件描述语言VerilogHDL完成基于FPGA、VGA的简易贪吃蛇设计。-Using hardware descr iption language VerilogHDL to complete the simple Snake design based on FPGA and VGA.
Fifo
- 一个FIFO源代码，基于Altera FPGA-A FIFO source code, based on Altera FPGA
wannianli
- 一款基于Verilog的ＦＰＧＡ万年历开发程序-A calendar based on Verilog, FPGA development process
The-way-of-divide-and-hex
- 这个文件中介绍了分频和各种进制编写的几种方法，VHDL语言，-This file is described in several sub-frequency and a variety of hex write the VHDL language,