资源列表
source-(2)
- 32k-point FFT verilog
sequence-detector
- 序列检测器的设计与实现。功能要求：检测器有一个输入端X，被检测的信号为二进制序列串行输入，检测器有一个输出端Z，当二进制序列连续有四个1时，输出为1，其余情况均输出为0。如：X：1101111110110，Z：0000001110000。 -Design and Implementation of the sequence detector. Functional requirements: the detector has an input terminal X and the dete
fir-digital--lowpass-filter
- 基于verilogHDL硬件描述语言的fir数字低通滤波器的设计-fir digital lowpass filter design based on verilogHDL
universal_prescalar
- Verilog Code for universal prescalar
Estacionamento
- code of a system park, check out
assign_statement
- assign statement descr iption
JTD
- 基于verilog的交通灯，倒计时并具有动态显示功能。红灯结束后黄灯闪烁5s,stop为高电平时，数码管闪烁并禁止通行-traffic light with a function of displaying and counting.
ov_control
- ov7620摄像头的同步控制程序，由vsync，href,pclk来控制图像行列及地址的输出-the ov7620 camera synchronization control procedures, vsync, href, pclk to control the image ranks and address of the output
spislave
- verilog 实现 spi接口程序代码。-come true spi using verilog！
Compteur
- code source for a counter
elevmain
- Signal Vs Variable difference code in VHDL
fdivision
- 实现2分频，4分频，8分频，64分频的多分频器-an frequency points which can realize 2 points frequency, 4 points frequency, 8 points frequency and 64 points frequency