资源列表
4port-sdram
- 4端口SDRAM控制器verilog程序-4-port SDRAM controller with verilog
key
- VHDL按键消抖程序，文中提到了两种方法。-VHDL key the debounced program, mentioned two methods.
WORDFILE
- Uedit中对Keil C51、A51、avr、x86汇编以及VHDL语言的突出显示格式文件-Uedit of Keil C51, A51, avr, x86 VHDL compilation of the highlights format
mp3
- MP3解码器的VHDL源代码 ,很实用的，设计时可以参考 ，很罕见的完整MP3 decoder源码 -VHDL code for MP3 decoder
lighting
- This road signal controller. highway and contry road controlling. goooooood!! FULL Verilog source.-This is road signal controller. highway and contry road controlling. goooooood!! FULL Verilog source.
VHDL
- 一些小的程序设计,解压后文件包里都有说明,大概有20个相关的程序吧
adaptivefi-filter
- this code consists of adaptive fir filter algorithm using LMS based approach.
s3esk_picoblaze_amplifier_and_adc_control
- picoblaze amplifier and adc LTC1407A-1 control
Verilog
- Verilog实例，对于初学者而言，是很好的案例-example of Verilog
LIP1745CORE_uart_txfsm
- UART TX FSM Verilog source code
clock
- 完整的VerilogHDL时钟例程，已通过硬件仿真。
Systemverilog_for_Verification
- Systemverilog for Verification源代码，包括arb_if,atm_virt_if,multi_if_port等-code of Systemverilog for Verification,